Translation of "Bus request" in German

You can then continue on to Grazalema by bus or request taxi service.

They are taken to the airport and the bus on request.

Can be connected to the bus at their request, a trailer as well.

Rent a bus now and request an individual journey!

Alternatively, you can be taken to the nearest bus stop on request.

You can then continue on to Grazalema by bus or request taxi service. Enlarge

We are able to arrange transportation by car, by minivan or by bus on your request.

By train: to Freudenstadt Hauptbahnhof, where you can be picked up by our hotel bus on request.

We are awaiting your bus charter request and shall be pleased to advise you!

We also provide free transfer from the port or airport with our mini bus, uppon request.

The M-Bus master can request data from several slaves (meters) on the network.

Contact data: Please send us your contact data when you send us a bus tour request.

Upon request bus and coach undertakings shall make available the international, Community or national law establishing the safety requirements, on which non-discriminatory access rules are based.

A, B and C designate three user systems whose bus request and bus approval signals 17' and 18' have in each case been entered one under the other.

If now its bus request signal 17' changes to "1", the R input of its RS flip-flop element 50 also receives, via the AND element 45, a "1" signal which, however, leaves the output signal of this RS flip-flop element unchanged.

Via its RS flip-flop element 42, user system A sets his bus approval signal 18' to "1" at time t6, see arrow 30, and keeps this state stored for as long as its bus request signal 17' is "1".

If the processor P1 wants to access the bus system BS, it triggers a corresponding bus request signal via a line L1, which is passed directly to the bus coupling element BK1 and activates the latter.

If the subordinate processor P2 would like to access the bus system BS, it gives off a corresponding bus request via a line L2, which leads to the bus arbiter B1, and to the bus arbiter B2.

If the processor P3 wants to access the bus system BS via the bus coupling element BK3, it outputs a bus request via a line L4, which is passed to the bus arbiter B2.

In much the same way, the system may be configured so that the module 3 may request the allocation of the bus 2 via the line BR through the command "bus request". Therefore, the module 3 can actively transmit its data via the address bus 16 and the data bus 17 to the controller 9.

Let it be further assumed that the processor P2 gives off its bus request with a time delay of a time T3 in each case.

Thus, a bus request of the processor P2 can now be activated immediately, without conflict with the processor P1, as shown in Diagram 5.

The RS flip-flop element 42 remains set, and thus the bus approval signal 18' remains at "1", until its own user system no longer requires the bus, that is to say until a bus request signal 17' supplied to the inverted R input of this flip-flop element assumes a value of "0".

The bus system is distinguished in that at least some of the units which can request bus access are allocated values which indicate how long and/or how frequently the relevant unit can be allocated the bus or has been allocated the bus, and in that these values are used to decide whether a unit which is requesting bus access is allocated the bus, or whether a unit which requires bus access is requesting the bus at all.